This application claims the benefit, under 35 U.S.C. xc2xa7119, of Korean Patent Application No. 2000-75570, filed on Dec. 12, 2000, the entirety of which is incorporated herein by reference.
1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly, to a method of forming a metal line in a semiconductor memory device.
2. Description of Related Art
A bit line of a semiconductor memory device is typically made of polycrystalline silicon or tungsten silicide. However, for a bit line of a dynamic random access memory (DRAM), having a design rule of less than about 0.15 mm, a low-resistance material is required. A low-resistance metal such as tungsten (W) has therefore been used to form bit lines of semiconductor memory devices. Methods of forming metal lines of semiconductor memory devices using such low-resistance metals are disclosed in Japanese Patent Publication Nos. 6-275625; 8-186120; and 9-199484.
A conventional method of forming a metal line for use in a semiconductor memory device begins by depositing a metal layer on a semiconductor substrate. The metal layer can include first, second, and third metal layers in a triple-layer structure. The first metal layer is a bit line and is preferably made of tungsten (W). The second metal layer is a barrier layer and is preferably made of titanium nitride (TiN). The third metal layer is an ohmic contact layer and is preferably made of titanium (Ti).
A silicon nitride film is formed on the third metal layer and a photoresist is applied to the silicon nitride film. The photoresist is patterned to form a photoresist pattern. The silicon nitride film is then patterned, using the photoresist pattern as a mask, to form a hard mask. The first, second, and third metal layers are then etched concurrently to form a metal line. Next, the photoresist pattern is removed through an ashing process, and the photoresist residue is removed through a cleaning process.
As described above, the conventional metal line has a three-layer structure in which layers of titanium, titanium nitride, and tungsten are sequentially formed on top of each other. Unfortunately, however, because the titanium layer, the titanium nitride layer, and the tungsten layer are all wet-etched and because a standard cleaning-1 (SC-1) type solution (NH4OH:H2O2:H2O) has a high cleaning power, an SC-1 type solution cannot be used as the cleaning agent. Similarly, a hydrogen fluoride (HF) solution, which also has a relatively high cleaning power, cannot be used as the cleaning agent in the cleaning process, since the titanium layer is wet-etched. A cleaning agent with a relatively low cleaning power must therefore be used for the cleaning process.
After etching the silicon nitride film and the metal layer, high conductive polymers are generated around exposed surfaces of the hard mask and the metal layer. Accordingly, when a cleaning agent having a relatively low cleaning power is used for the cleaning process, these conductive polymers are not sufficiently removed. Conductive polymers that are not sufficiently removed can cause short circuits, such as between a bit line and a storage contact. Furthermore, a micro-masking phenomenon can occur due to the irregular conductive polymers, causing a metal line pattern to be irregularly formed.
In the conventional method of forming a metal line, a portion of an etching gas generally remains after etching the silicon nitride film. Since the process of etching the silicon nitride mask and the process of etching the metal layer are sequentially performed in different chambers, any etching gas remaining after the process of etching the silicon nitride film can cause a side reaction resulting in an uncleanable condensation state. This condensed gas reacts with tungsten and prevents the tungsten from being etched, thereby resulting in an irregularly patterned tungsten layer. Defects due to conductive polymers and condensed gases represent about 40% of all defects in semiconductor memory devices.
To overcome the problems described above, embodiments of the present invention provide a method of forming a metal line in a semiconductor memory device that results in a high manufacturing yield.
The preferred method includes sequentially depositing first, second, and third metal layers on a semiconductor substrate. A fourth layer is then deposited on the third metal layer. The fourth layer is etched to form a hard mask. A first cleaning process is performed using a first cleaning agent, a second cleaning agent, or both. The third metal layer is etched according to the hard mask. The first cleaning agent is then used in a second cleaning process. The second cleaning process could also proceed, however, by using a second cleaning agent either before or after using the first cleaning agent. The first and second metal layers are then etched simultaneously according to the hard mask. A third cleaning process is performed using the second cleaning agent.
When the first and second cleaning agents are both used, the second cleaning agent is preferably used after using the first cleaning agent alone. The second cleaning agent preferably has a lower cleaning power than the first cleaning agent. The first cleaning agent can be a fluoride compound (such as HF) or an SC-1 type solution, and the second cleaning agent can be an organic cleaning agent containing an amine group, or a mixed solution of an acetic compound and a diluted HF solution.
The first metal layer preferably comprises titanium and functions as an ohmic contact layer. The second metal layer preferably comprises titanium nitride and functions as a barrier layer. The third metal layer preferably comprises tungsten and functions as a bit line. A fourth layer preferably comprises silicon nitride.
Using the methods of forming the metal line according to the present invention, line defects of the metal line such as short circuits between the bit line and the storage contact due to the conductive polymer and the etching gas condensation can be prevented, resulting in a higher manufacturing yield.